11 research outputs found

    X/Ka-Band Dual-Polarized Digital Beamforming Synthetic Aperture Radar

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    This paper presents a digital beamforming (DBF) synthetic aperture radar (SAR) for future spaceborne earth observation systems. The objective of the DBF-SAR system is to achieve a low cost, lightweight, low-power consumption, and dual-band (X/Ka) dual-polarized module for the next-generation spaceborne SAR system in Europe. The architectures and modules of the proposed DBF-SAR system are designed according to a realistic mission scenario, which is compatible with the future small/microsatellites platforms. This system fills an important gap in the conception of the future DBF-SAR, facilitating a high level of integration and complexity reduction. The proposed system is considered not only the first demonstrator of a receive-only spaceborne DBF system, but also the first X/Ka-band dual-polarized SAR system with shared aperture. This paper presents a description of the proposed instrument hardware and first experimental validations. The concept and design of the DBF multistatic SAR system are discussed and presented first, followed by the design of subsystems such as DBF networks, microwave integrated circuit, and antennas. Simulated and measured results of the subsystems are presented, demonstrating that the proposed SAR instrument architecture is well-suited for the future SAR applications

    Low-power and low-voltage analog baseband and quadrature frequency synthesizer

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    Following the trend in portable wireless communications, this dissertation explores new approaches to designing of power-critical building blocks in the elementary circuit level. Specifically, the work focuses on designs of baseband continuous-time Gm-C filter, LC-resonator quadrature oscillators, transistor-only quadrature oscillators and LC-resonator frequency dividers. The established circuits share a common design objective of low-power and low-voltage operation, where the simplicity of the demonstrated topologies serves as a basis. The dissertation is separated in two parts. The first part is dedicated for the baseband section where a 3rd-order Bessel filter is designed and fabricated. The filter comprises a set of linear transconductors, which each one is based on the operation of triode-biased transistors. According to the operation in this region and to the simplicity of the transconductor, high dynamic range can be achieved for a supply voltage as low as 1.2 V. In the other part, attempts in reducing the power consumption of two critical building blocks in a frequency synthesizer, namely, the quadrature oscillator and the first-stage frequency divider, are introduced. For the oscillators, two quadrature oscillators based on LC resonators are presented, in conjunction with a transistor-only quadrature oscillator. Quadrature signal generations in these designs are achieved by making use of the principles of ring oscillator and coupled oscillator. The last building block that is designed in this part is the LC-based injection-locked frequency divider. The single-ended Colpitts oscillator topology is used as the core circuit of the divider due to its simplicity and low-voltage property. Detailed analysis concerning the phase relationship between the input and the output leads to the implementations of differential and quadrature divider configurations. Although a silicon integration is done only for the baseband filter, the concept, the operation and the theories developed for the quadrature oscillators and the frequency dividers have been verified against simulations and measurements employing low-frequency discrete prototypes. As they are illustrated in each chapter, the established theories match closely to the measurements

    Shunt-Feedback Ring Oscillator: a New Topology for Wideband Multiphase Signal Generations

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    A negative-feedback scheme is applied to the gain stage of RC and LC ring oscillators to extend the frequency tuning range and to enhance the maximum oscillation frequency, respectively. This can be achieved without penalties in power consumption, supply voltage and silicon area. To verify the operation of the proposed topology, the theory of a three-stage shunt-feedback ring oscillator has been developed and compared with simulation results. Differential versions of 1.2-V shuntfeedback RC and LC ring oscillators operating, respectively, at 5 GHz and 11.6 GHz are demonstrated by simulations using a 0.18-ÎĽm CMOS technology

    Bulk-source-coupled CMOS Quadrature Oscillators

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    A quadrature oscillator based on a coupling between the bulk and the source of MOS transistors is proposed. Since the resonator load is not directly involved in the coupling process, the oscillation frequency is very close to the resonant frequency, hence a good phase noise characteristic. The developed theory matches very well to the simulations

    Systèmes de communications à Ultra Large Bande

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    Selon les normes de la FCC (Federal communications commision), un signal est considéré comme Ultra Large Bande (ULB) si la largeur de bande occupée est d’au moins 500 MHZ ou si la valeur de la bande relative est supérieure à 0.2. Par ailleurs, une communication à ULB est permise uniquement si les densités spectrales sont respectés durant l'émission

    A Low-Power, Low Data-Rate, Ultra-Wideband Receiver Architecture for Indoor Wireless Systems

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    Abstract—In this paper, a novel architecture for a low data-rate, low power consumption Impulse Radio (IR) Ultra- Wideband (UWB) receiver is presented in which the received UWB signal is downconverted to a given intermediate frequency (IF) rather than at baseband. This way, the requirement to implement two separate paths for the in-phase and the quadrature components is removed and the power consumption can be reduced. From the IF, the signal is converted to the digital domain by a set of 24 Redundant Signed Digit (RSD) Analog to Digital Converters (ADCs) working at the pulse repetition rate. The digitized signal is then correlated with a predefined template prior to be fed to the bit detector. The trade-offs for the selection of the IF are highlighted and the BER performance of the proposed receiver is evaluated using simulations in 802.15.3a multipath channels. The expected power consumption for the implementation of the receiver using a CMOS process is also provided

    A 60-Channels ADC Board for Space Borne DBF-SAR Applications

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    A 60-Channels ADC (Analog to Digital Converter) board for space borne Digital Beam Forming (DBF) Synthetic Aperture Radar (SAR) applications is described. The purpose of the board is to digitize analog signals detected by a dual band SAR receiving array operating at X and Ka band. It contains 48 high speed ADCs, which sample synchronously the incoming data of the antenna front end at Ka band. Other 12 ADCs are used to sample the coming data from the X band antennas. The board is composed by an analog section, a digital section and a clock distribution network used to synchronize the ADCs. Output digital signals from the board are routed to digital boards were are processed in the Digital Beamforming Network (DBFN)

    Highly Integrated Dual-Band Dual-Polarized Antenna Tile for SAR Applications

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    The experimental assessment of a highly integrated dual-band (9.6 and 35.75 GHz) dual-polarized antenna tile designed for Synthetic Aperture Radar (SAR) Digital Beam Forming (DBF) satellite applications is presented. Antennas, transitions and down-conversion chips are integrated in the same board fabricated using a customized 15 layer PCB. The experimental assessment proves the validity of the proposed manufacturing and integration approaches, a good agreement between the performance of the individual blocks and of the integrated system has been demonstrated
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